Project demonstration
An automatic browser demonstration of the project concept.
Browser demonstration with synthetic inputs; not a recording of FPGA hardware.
Project overview
The target is a USB webcam-to-HDMI system using the Zynq processing system for camera capture and programmable logic for video output. USB camera capture and the complete end-to-end video pipeline remain under development.
Key features
- Development focus: camera acquisition, frame handling, and HDMI video output.
- Investigated: USB camera descriptors and MJPEG / YUYV modes.
- Planned: USB host capture, MJPEG decoding, DDR frame buffers, and VDMA.
High-level architecture
Notebook architecture

Engineering challenges
Completing the camera path requires USB enumeration and UVC transfers, assembling and decoding MJPEG frames, and feeding buffered video to the output pipeline. The current bitstream does not configure the processing system, DDR, or USB host.
Validation & current status
The README records clock and reset revisions intended to address flicker. The updated build and HDMI output still need confirmation on the board. There is no completed webcam demonstration or standalone ARM application.
Scope & limitations
The diagram shows the target webcam-to-HDMI architecture. Webcam capture and PS / DDR / VDMA integration remain future work.
