Engineering notes from a personal hobby project. Validation results are drawn from project documentation; hardware status is stated below.
A game built from a video stream
The Pong project targets the original Zybo with an XC7Z010 FPGA. Two players use four onboard buttons, and the HDMI output carries a fixed 1280 × 720 picture at approximately 59.975 frames per second. All game functionality lives in programmable logic: there is no ARM application, operating system, or external frame memory. The design separates input handling, game state, pixel rendering, and video transmission so each part has a clear responsibility.
Keep the scene stable during a frame
The renderer decides a pixel’s color from its coordinates and the current paddles, ball, and scores. The game advances once per frame at the beginning of vertical blanking, when the visible picture has finished. Movement, wall reflection, paddle collision, and state commitment occupy four pixel-clock cycles. Those updates finish during blanking, leaving a consistent scene for the next active frame. The controls and game logic use the pixel clock; the slower game update is an enable event, rather than another clock.
Turn physical buttons into predictable controls
Each button and the reset switch pass through two-stage synchronization and approximately 5 ms of press/release filtering. Holding a button moves its paddle; pressing both directions for the same paddle cancels movement. Paddles stop at the playfield boundaries. These small decisions give the control logic explicit behavior for cases that otherwise become difficult to diagnose during gameplay.
Collisions need the next position
Collision checks consider the ball’s next position and the paddles’ updated positions. The design reflects the ball at collision planes to avoid leaving it embedded in a paddle. Where the ball strikes the paddle changes its vertical speed: a central hit produces a shallower trajectory than an upper or lower hit. Missing the ball awards one point and starts a one-second serve pause. Scores wrap from 99 to 00; there is no winning-score limit.
Verification before the board demonstration
The repository records eight passing VUnit tests covering game logic, rendering, and button behavior. Cases include sustained rallies, wall overshoot, opposite-button cancellation, scoring in both directions, and reset during movement. It also records successful GHDL synthesis and Vivado routing, with +1.068 ns setup slack and +0.122 ns hold slack. These are recorded results, not checks rerun for this article. Hardware gameplay testing remains pending; the next demonstration should verify all four controls, scoring, reset, and a fresh serve on the physical board.
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