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Project demonstration
An automatic browser demonstration of the project concept.
Browser demonstration with synthetic inputs; not a recording of FPGA hardware.
Project overview
A two-player game implemented entirely in FPGA logic. Four onboard buttons control the paddles, while the design handles ball movement, collisions, scoring, and HDMI rendering without an ARM application or external frame memory.
Key features
- Two independently controlled paddles with synchronized, debounced buttons.
- Wall and paddle collisions, two-digit scores, and a one-second serve countdown.
- Fixed 1280 × 720 video at approximately 59.975 frames per second.
High-level architecture
Notebook architecture
Engineering challenges
Game state updates during vertical blanking so paddles, the ball, and scores stay stable throughout each visible frame. Movement and collision decisions are split across four pixel-clock cycles, and the renderer keeps RGB and video timing aligned.
Validation & current status
Repository-recorded validation: eight selected VUnit tests passed, GHDL synthesis passed, and Vivado routing and bitstream generation passed. Reported setup slack is +1.068 ns and hold slack is +0.122 ns, with 679 LUTs, 281 registers, and 3 DSPs used. These checks were not rerun for this website update. Gameplay, controls, scoring, and reset still require hardware testing.
Scope & limitations
Targets the original Zybo. A display accepting the fixed 720p mode is required; HDMI audio and EDID negotiation are not implemented.